Memory – Nand2Tetris (Week 3)

  1. Sequential Logic
    • need a notion of things happening after another
    • must be able to reuse hardware to compute multiple things and remember state
    • we break up time into discrete units which helps us think about things in cycles / units
    • combinatorial: input and output happens at same time unit out[t] = function(in[t])
    • sequential: out[t] = function(in[t-1])
  2. Flip Flips
    • Need something to remember bits of information
    • flip flop (DFF) goes to 0 and back to 1
    • we will treat this as a primitive operation
    • First chip we will design will remember its information forever unless we set the load
  3. Memory Units
    • main memory: RAM
    • secondary memory: disks, memory chips
    • volatile/non-volatile
    • We will tend to focus on logical perspectives vs physical
    • we can combine single bit chips to make registers
    • registers will store some value “register state”
    • we can read a register by probing the output
    • registers are the building blocks of memory
    • RAM Abstraction: sequence of n addressable registers 0 to n-1
    • only one register in RAM is selected at a time
    • width of address input can be represented by k = log 2 n
    • to read from ram set address = i and out emits the state of register i
    • to write, set address = i, in = v, and load = 1 and out will emit v
    • Random Access Memory: any address access is basically instantaneous
  4. Counters
    • counter tells what instruction to do next
    • must be able to reset (set to 0), next (inc 1), and goto (set n)
  5. Project 3
    • Will start with chips from project 1, project 2, and DFF gate
    • Will build Bit, Register, RAM8, RAM64, RAM512, RAM4K, RAM16K, PC (Program Counter)
    • 1 Bit – can be built from DFF and multiplexor
    • 16-Bit – multiple 1-Bit registers
    • 8-Register RAM – feed the in value to all registers at same time. use mux/demux to select exact registers
    • stack in recursively ascending manner to build bigger ones
    • think of address input as having two fields: 1) select RAM part 2) select register w/in the RAM part
    • use mux/demux to effect this addressing scheme
    • PC – can be built from register, an incrementer, and some logic gates
  6. Perspectives
    • Flip flop gates can be implemented with NAND gates that loop output to each other which allows storing of state
    • RAM is most important and volatile
    • ROM (Read only memory) is non-volatile and has code for booting process
    • flash memory: combines good from both RAM and ROM. Is read/write and non-volatile
    • cache memory: there is cost trade-off between faster memory. can use hierarchy of smaller more expensive/faster memory. this lets you have small fast/expensive memory and large/cheap memory and still have good performance
    • all memory is based on registers though